David S. Pratt
46Patents
10h-index
49Co-inventors
75Inventor score
Filing activity: Apr 26, 1979 → Apr 12, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US4249541A | Biopsy device | Human Necessities | 117 | Expired |
| US10127596B1 | Systems, methods, and devices for generating recommendations of unique items | Physics | 48 | Active |
| US5590209A | Mount for supporting a microphone on a helmet | Electricity | 27 | Expired |
| US7800238B2 | Surface depressions for die-to-die interconnects and associated systems and methods | Electricity | 16 | Active |
| US9276319B2 | Electronic device antenna with multiple feeds for covering three communications bands | Electricity | 15 | Active |
| US8193092B2 | Semiconductor devices including a through-substrate conductive member with an exposed end and methods of manufacturing such semiconductor devices | Electricity | 14 | Active |
| US7531443B2 | Method and system for fabricating semiconductor components with through interconnects and back side redistribution conductors | Electricity | 13 | Active |
| US8084854B2 | Pass-through 3D interconnect for microelectronic dies and associated systems and methods | Electricity | 12 | Active |
| US7792799B2 | Backing up a wireless computing device | Physics | 11 | Expired |
| US7886267B2 | Multiple-developer architecture for facilitating the localization of software applications | Physics | 11 | Active |
| US9337537B2 | Antenna with tunable high band parasitic element | Electricity | 10 | Active |
| US8674522B1 | Castle-like chop mask for forming staggered datalines for improved contact isolation and pattern thereof | Electricity | 7 | Active |
| US7952170B2 | System including semiconductor components having through interconnects and back side redistribution conductors | Electricity | 5 | Active |
| US8585915B2 | Methods for fabricating sub-resolution alignment marks on semiconductor structures | Emerging Cross-Sectional Technologies | 4 | Active |
| US9209166B2 | Semiconductor assemblies, stacked semiconductor devices, and methods of manufacturing semiconductor assemblies and stacked semiconductor devices | Electricity | 4 | Active |
| US8367471B2 | Semiconductor assemblies, stacked semiconductor devices, and methods of manufacturing semiconductor assemblies and stacked semiconductor devices | Electricity | 4 | Active |
| US8021981B2 | Redistribution layers for microfeature workpieces, and associated systems and methods | Electricity | 4 | Active |
| US9209158B2 | Pass-through 3D interconnect for microelectronic dies and associated systems and methods | Electricity | 3 | Active |
| US8853868B2 | Semiconductor structures including sub-resolution alignment marks | Emerging Cross-Sectional Technologies | 3 | Active |
| US9711457B2 | Semiconductor devices with recessed interconnects | Electricity | 2 | Active |
| US7951709B2 | Method and apparatus providing integrated circuit having redistribution layer with recessed connectors | Electricity | 2 | Active |
| US9166634B2 | Electronic device with multiple antenna feeds and adjustable filter and matching circuitry | Electricity | 2 | Active |
| US10963942B1 | Systems, methods, and devices for generating recommendations of unique items | Physics | 2 | Active |
| US8664077B2 | Method for forming self-aligned overlay mark | Physics | 2 | Active |
| US7812461B2 | Method and apparatus providing integrated circuit having redistribution layer with recessed connectors | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.