Resistive random access memory devices
US11515475B2 · kind B2 · utility
0Cited by
2References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 14, 2020 |
| Grant date | Nov 29, 2022 |
| Priority date | — |
| Expiry date | Nov 20, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N70/8836
Abstract
The present disclosure generally relates to memory devices and methods of forming the same. More particularly, the present disclosure relates to resistive random-access (ReRAM) memory devices. The present disclosure provides a memory device including an opening in a dielectric structure, the opening having a sidewall, a first electrode on the sidewall of the opening, a spacer layer on the first electrode, a resistive layer on the first electrode and upon an upper surface of the spacer layer, and a second electrode on the resistive layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.