Yi Jiang
41Patents
7h-index
32Co-inventors
65Inventor score
Filing activity: Dec 30, 2008 → Mar 18, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9865649B2 | Integrated two-terminal device and logic device with compact interconnects having shallow via for embedded application | Electricity | 24 | Active |
| US10290679B1 | High-Density STT-MRAM with 3D arrays of MTJs in multiple levels of interconnects and method for producing the same | Electricity | 18 | Active |
| US10580968B1 | Integrated circuit with memory cells having reliable interconnection | Electricity | 15 | Active |
| US10121964B2 | Integrated magnetic random access memory with logic device | Electricity | 13 | Active |
| US10199572B2 | Integrated magnetic random access memory with logic device | Electricity | 11 | Active |
| US9397139B1 | Integrated inductor and magnetic random access memory device | Electricity | 8 | Active |
| US10096768B2 | Magnetic shielding for MTJ device or bit | Electricity | 7 | Active |
| US9349772B2 | Methods for fabricatingintegrated circuits with spin torque transfer magnetic randomaccess memory (STT-MRAM) including a passivation layer formed along lateral sidewalls of a magnetic tunnel junction of the STT-MRAM | Electricity | 6 | Active |
| US9972775B2 | Integrated magnetic random access memory with logic device having low-k interconnects | Electricity | 6 | Active |
| USD741869S1 | Mounting arm for flat panel display | General | 5 | Active |
| US10461247B2 | Integrated magnetic random access memory with logic device having low-K interconnects | Electricity | 4 | Active |
| US9553129B2 | Magnetic tunnel junction stack alignment scheme | Electricity | 4 | Active |
| US10483461B2 | Embedded MRAM in interconnects and method for producing the same | Electricity | 3 | Active |
| USD741870S1 | Mounting arm for flat panel display | General | 2 | Active |
| US10693054B2 | MTJ bottom metal via in a memory cell and method for producing the same | Electricity | 2 | Active |
| US10651380B1 | Memory devices and methods of forming the same | Electricity | 2 | Active |
| US8502766B2 | Flat display panel and active device array substrate and light-on testing method thereof | Physics | 2 | Active |
| US9343662B2 | Magnetic memory device and method of forming thereof | Electricity | 2 | Active |
| US11978510B2 | Memory devices and methods of forming the same | Physics | 1 | Active |
| US10593728B1 | Integrated circuits and methods for fabricating integrated circuits with magnetic tunnel junction (MTJ) structures | Electricity | 1 | Active |
| US9806128B2 | Interposers for integrated circuits with multiple-time programming and methods for manufacturing the same | Electricity | 1 | Active |
| US10475990B2 | Pillar contact extension and method for producing the same | Electricity | 1 | Active |
| US10381403B1 | MRAM device with improved seal ring and method for producing the same | Electricity | 1 | Active |
| US10262868B1 | Self-aligned planarization of low-K dielectrics and method for producing the same | Electricity | 1 | Active |
| US9564575B2 | Dual encapsulation integration scheme for fabricating integrated circuits with magnetic random access memory structures | Electricity | 1 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.