Non-volatile memory having write detect circuitry
US11521665B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 4, 2021 |
| Grant date | Dec 6, 2022 |
| Priority date | — |
| Expiry date | May 4, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1657
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A non-volatile memory includes resistive cells, write circuitry, and write detect circuitry. Each resistive cell has a resistive storage element and is coupled to a corresponding first column line and corresponding second column line. The write circuitry is configured to provide a write current through a resistive storage element of a selected resistive memory cell during a write operation based on an input data value. The write detect circuitry is configured to generate a reference voltage using a voltage at the corresponding first column line coupled to the selected resistive memory cell at an initial time of the write operation, and, during the write operation, after the initial time, provide a write detect signal based on a comparison between the voltage at the corresponding first column line coupled to the selected resistive memory cell and the reference voltage, wherein the input data value is based on the write detect signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.