Karthik Ramanan
23Patents
5h-index
10Co-inventors
62Inventor score
Filing activity: Aug 28, 2009 → May 28, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7948301B2 | Charge pump with charge feedback and method of operation | Electricity | 12 | Active |
| US8932925B1 | Split-gate non-volatile memory (NVM) cell and device structure integration | Electricity | 10 | Active |
| US8830776B1 | Negative charge pump regulation | Electricity | 9 | Active |
| US8829964B1 | Compensated hysteresis circuit | Electricity | 6 | Active |
| US8008964B1 | Variable input voltage charge pump | Electricity | 5 | Active |
| US10796741B1 | Non-volatile memory with a select gate regulator circuit | Physics | 5 | Active |
| US8704587B2 | Configurable multistage charge pump using a supply detect scheme | Electricity | 5 | Active |
| US8476963B2 | Exponential charge pump | Electricity | 5 | Active |
| US8310300B2 | Charge pump having ramp rate control | Electricity | 4 | Active |
| US11521692B2 | Memory with one-time programmable (OTP) cells and reading operations thereof | Physics | 4 | Active |
| US7965130B1 | Low power charge pump and method of operation | Electricity | 4 | Active |
| US9007138B2 | Oscillator with startup circuitry | Electricity | 2 | Active |
| US9111629B2 | Smart charge pump configuration for non-volatile memories | Physics | 1 | Active |
| US11145382B1 | Non-volatile memory with a well bias generation circuit | Physics | 1 | Active |
| US8040700B2 | Charge pump for use with a synchronous load | Electricity | 1 | Active |
| US9209810B2 | Ratioless near-threshold level translator | Electricity | 1 | Active |
| US10984846B2 | Reference generation for voltage sensing in a resistive memory | Physics | 1 | Active |
| US11289144B1 | Non-volatile memory with virtual ground voltage provided to unselected column lines during memory write operation | Physics | 1 | Active |
| US8278977B2 | Refresh operation during low power mode configuration | Emerging Cross-Sectional Technologies | 0 | Active |
| US11250898B2 | Non-volatile memory with multiplexer transistor regulator circuit | Physics | 0 | Active |
| US11521665B2 | Non-volatile memory having write detect circuitry | Physics | 0 | Active |
| US11348628B2 | Non-volatle memory with virtual ground voltage provided to unselected column lines during memory read operation | Physics | 0 | Active |
| US11742012B2 | Memory read circuitry with a flipped voltage follower | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.