Hybrid embedded package
US11521907B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 14, 2020 |
| Grant date | Dec 6, 2022 |
| Priority date | — |
| Expiry date | Nov 11, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15174
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor package includes a substrate formed of electrically insulating material and having a die mounting surface, a first semiconductor die embedded within the substrate and comprising a first conductive terminal that faces the die mounting surface, a second semiconductor die mounted on the die mounting surface and comprising a first conductive terminal that faces and is spaced apart from the die mounting surface, and a first electrical connection that directly connects the first conductive terminals of the first and second semiconductor dies together, wherein the second semiconductor die partially overlaps with the first semiconductor die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.