Gate-all-around integrated circuit structures having source or drain structures with epitaxial nubs

US11522048B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Cory Bomberger · Portland, US
• Anand S. Murthy · Beaverton, US
• Mark Bohr · Beaverton, US
• Tahir Ghani · Portland, US
• Biswajeet Guha · Hillsboro, US

Key dates

• Filing date: Mar 22, 2019
• Grant date: Dec 6, 2022
• Expiry date: Apr 5, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/832
• WIPO field: Micro-structural and nano-technology
• WIPO sector: Chemistry

Abstract

Gate-all-around integrated circuit structures having source or drain structures with epitaxial nubs, and methods of fabricating gate-all-around integrated circuit structures having source or drain structures with epitaxial nubs, are described. For example, an integrated circuit structure includes a first vertical arrangement of horizontal nanowires and a second vertical arrangement of horizontal nanowires. A first pair of epitaxial source or drain structures includes vertically discrete portions aligned with the first vertical arrangement of horizontal nanowires. A second pair of epitaxial source or drain structures includes vertically discrete portions aligned with the second vertical arrangement of horizontal nanowires. A conductive contact structure is laterally between and in contact with the one of the first pair of epitaxial source or drain structures and the one of the second pair of epitaxial source or drain structures.