Method for increasing photoresist etch selectivity to enable high energy hot implant in SiC devices
US11527412B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2020 |
| Grant date | Dec 13, 2022 |
| Priority date | — |
| Expiry date | Aug 16, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31111
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for performing an ion implantation process including providing a hardmask layer disposed atop a substrate, providing a photoresist layer disposed atop the hardmask layer and defining a pattern exposing a portion of the hardmask layer, performing a room temperature ion implantation process wherein an ion beam formed of an ionized first dopant species is directed onto the exposed portion of the hardmask layer to make the exposed portion more susceptible to ion etching or wet etching, performing an etching process wherein the exposed portion of the hardmask layer is etched away to expose an underlying portion of the substrate, and performing a high energy, hot ion implantation process wherein an ion beam formed of a ionized second dopant species is directed onto the exposed portion of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.