Line cut patterning using sacrificial material
US11527434B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 20, 2020 |
| Grant date | Dec 13, 2022 |
| Priority date | — |
| Expiry date | Nov 4, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76892
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating a semiconductor device includes forming a first line pattern within sacrificial mandrel material disposed on at least one hard mask layer disposed on a substrate. The first line pattern has a pitch defined by a target line width and a minimum width of space between lines. The method further includes forming, within the first line pattern, a first spacer having a width corresponding to the minimum width of space between lines to minimize pinch points and a first gap having the target line width, and forming a first plug within the first gap corresponding to a first location above the at least one hard mask layer to block pattern transfer into the at least one hard mask layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.