Managing programming convergence associated with memory cells of a memory sub-system
US11532367B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 8, 2020 |
| Grant date | Dec 20, 2022 |
| Priority date | — |
| Expiry date | Dec 8, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A first programming pulse is caused to be applied to a wordline associated with a memory cell of the memory sub-system. In response to first programming pulse, causing a program verify operation to be performed to determine a measured threshold voltage associated with the memory cell. The measured threshold voltage associated with the memory cell is stored in a sensing node. A determination is made that the measured threshold voltage of the memory cell satisfies a condition and the measured threshold voltage stored in the sensing node is identified. A bitline voltage matching the measured threshold voltage is caused to be applied to a bitline associated with the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.