Inventor · San Jose, CA, US

Erwin E. Yu

24Patents

3h-index

30Co-inventors

59Inventor score

Filing activity: May 15, 2006 → Jul 20, 2023

Most-cited inventions

Patent	Title	Area	Cited by	Status
US7663925B2	Method and apparatus for programming flash memory	Physics	11	Active
US9633744B2	On demand knockout of coarse sensing based on dynamic source bounce detection	Physics	3	Active
US9842655B2	Reducing verification checks when programming a memory device	Physics	3	Active
US10127988B2	Temperature compensation in memory sensing	Physics	3	Active
US11335412B2	Managing sub-block erase operations in a memory sub-system	Physics	2	Active
US7974129B2	Method and apparatus for programming flash memory	Physics	2	Active
US10163500B1	Sense matching for hard and soft memory reads	Physics	2	Active
US10049759B2	Reducing verification checks when programming a memory device	Physics	1	Active
US8179726B2	Method and apparatus for programming flash memory	Physics	1	Active
US11562791B1	Memory devices with four data line bias levels	Physics	1	Active
US11749353B2	Managing sub-block erase operations in a memory sub-system	Physics	1	Active
US11532367B2	Managing programming convergence associated with memory cells of a memory sub-system	Physics	1	Active
US11442091B2	Apparatus and methods for determination of capacitive and resistive characteristics of access lines	Electricity	1	Active
US11862257B2	Managing programming convergence associated with memory cells of a memory sub-system	Physics	0	Active
US12101932B2	Microelectronic devices, and related memory devices and electronic systems	Performing Operations; Transporting	0	Active
US11557351B2	Sense circuit to sense two states of a memory cell	Physics	0	Active
US12183396B2	Memory array structures and methods of forming memory array structures	Physics	0	Active
US12171096B2	Microelectronic devices, and related memory devices and electronic systems	Physics	0	Active
US10790029B2	Temperature compensation in memory sensing	Physics	0	Active
US11942159B2	Selective management of erase operations in memory devices that enable suspend commands	Physics	0	Active
US12276686B2	Apparatus for determination of capacitive and resistive characteristics of access lines	Physics	0	Active
US12068037B2	Managing sub-block erase operations in a memory sub-system	Physics	0	Active
US11915758B2	Memory devices with four data line bias levels	Physics	0	Active
US11557341B2	Memory array structures and methods for determination of resistive characteristics of access lines	Physics	0	Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.