Integrated circuit structure including asymmetric, recessed source and drain region and method for forming same
US11532745B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 2, 2020 |
| Grant date | Dec 20, 2022 |
| Priority date | — |
| Expiry date | Jul 10, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
Abstract
Integrated circuit (IC) structures including asymmetric, recessed source and drain regions and methods for forming are provided. In an example, the IC structure includes a substrate, a gate structure over the substrate, first and second spacers contacting respective, opposite sidewalls of the gate structure, and source and drain regions on opposite sides of the gate structure. In one configuration, the source region includes an upper source portion having a first lateral width, and a lower source portion having a second lateral width greater than the first lateral width, and the drain region includes an upper drain portion having a third lateral width, and a lower drain portion having a fourth lateral width that is substantially the same as the third lateral width.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.