Patent · US Active

Deposition of charge trapping layers

US11532757B2 · kind B2 · utility

1Cited by

2,214References

19Claims

0Family size

Assignee

ASM IP Holding B.V. · NL

Inventors

Pauline Calka · Leuven, BE
Qi Xie · Wilsele, BE
Dieter Pierreux · Dilbeek, BE
Bert Jongbloed · Oud-Heverlee, BE

Key dates

Filing date	Oct 6, 2017
Grant date	Dec 20, 2022
Priority date	—
Expiry date	Oct 6, 2037

Classification

Technology area (CPC H)Electricity
CPC primaryH10D30/0413
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor device and method for manufacturing the semiconductor device are disclosed. Specifically, the semiconductor device may include a charge trapping layer with improved retention and speed for VNAND applications. The charge trapping layer may comprise an aluminum nitride (AlN) or aluminum oxynitride (AlON) layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.