Asymmetric cored integrated circuit package supports
US11552008B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 28, 2018 |
| Grant date | Jan 10, 2023 |
| Priority date | — |
| Expiry date | May 13, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1536
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are asymmetric cored integrated circuit (IC) package supports, and related devices and methods. For example, in some embodiments, an IC package support may include a core region having a first face and an opposing second face, a first buildup region at the first face of the core region, and a second buildup region at the second face of the core region. A thickness of the first buildup region may be different than a thickness of the second buildup region. In some embodiments, an inductor may be included in the core region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.