Memory array structures and methods for determination of resistive characteristics of access lines
US11557341B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 3, 2020 |
| Grant date | Jan 17, 2023 |
| Priority date | — |
| Expiry date | Sep 3, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/4402
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory array structures providing for determination of resistive characteristics of access lines might include a first block of memory cells, a second block of memory cells, a first current path between a particular access line of the first block of memory cells and a particular access line of the second block of memory cells, and, optionally, a second current path between the particular access line of the second block of memory cells and a different access line of the first block of memory cells. Methods for determining resistive characteristics of access lines might include connecting the particular access line of the first block of memory cells to a driver, and determining the resistive characteristics in response to a current level through that access line and a voltage level of that access line.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.