Method for fabricating a semiconductor package, semiconductor package and embedded PCB module

US11562967B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Richard Knipper · Regensburg, DE
• Frank Daeche · Unterhaching, DE

Key dates

• Filing date: Mar 22, 2021
• Grant date: Jan 24, 2023
• Expiry date: Mar 22, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H05K1/185
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method for fabricating a semiconductor package includes: providing a semiconductor wafer having opposing first and second sides, the semiconductor wafer being arranged on a first carrier such that the second side of the wafer faces the carrier; masking sawing lines on the first side of the semiconductor wafer with a mask; depositing a first metal layer on the masked first side of the semiconductor wafer by cold spraying or by high velocity oxygen fuel spraying or by cold plasma assisted deposition, such that the first metal layer does not cover the sawing lines, the deposited first metal layer having a thickness of 50 μm or more; singulating the semiconductor wafer into a plurality of semiconductor dies by sawing the semiconductor wafer along the sawing lines; and encapsulating the plurality of semiconductor dies with an encapsulant such that the first metal layer is exposed on a first side of the encapsulant.