Integrated memory with redistribution of capacitor connections, and methods of forming integrated memory

US11563008B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Guangjun Yang · Shanghai, CN
• Vinay Nair · Boise, US
• Devesh Dadhich Shreeram · Boise, US
• Ashwin Panday · Ann Arbor, US
• Kangle Li · Boise, US
• Zhiqiang Xie · Fuzhou, CN
• Silvia Borsari · Boise, US
• Mohd Kamran Akhtar · Boise, US
• Si-Woo Lee · Boise, US

Key dates

• Filing date: Mar 8, 2021
• Grant date: Jan 24, 2023
• Expiry date: May 1, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/34

Abstract

Some embodiments include an integrated assembly having digit-line-contact-regions between pairs of capacitor-contact-regions. The capacitor-contact-regions are arranged with six adjacent capacitor-contact-regions in a substantially rectangular configuration. Conductive plugs are coupled with the capacitor-contact-regions. Conductive redistribution material is coupled with the conductive plugs. Upper surfaces of the conductive redistribution material are arranged in a substantially hexagonal-close-packed configuration. Digit lines are over the digit-line-contact-regions. Insulative regions are between the digit lines and the conductive plugs. The insulative regions contain voids and/or low-k dielectric material. Capacitors are coupled with the upper surfaces of the conductive redistribution material.