Non-planar silicided semiconductor electrical fuse
US11574867B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 25, 2020 |
| Grant date | Feb 7, 2023 |
| Priority date | — |
| Expiry date | Mar 26, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/911
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electrical fuse (e-fuse) includes a fuse link including a silicided semiconductor layer over a dielectric layer covering a gate conductor. The silicided semiconductor layer is non-planar and extends orthogonally over the gate conductor. A first terminal is electrically coupled to a first end of the fuse link, and a second terminal is electrically coupled to a second end of the fuse link. The fuse link may be formed in the same layer as an intrinsic and/or extrinsic base of a bipolar transistor. The gate conductor may control a current source for programming the e-fuse. The e-fuse reduces the footprint and the required programming energy compared to conventional e-fuses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.