Lateral bipolar junction transistor and method

US11575029B2 · kind B2 · utility

Assignee

• GLOBALFOUNDRIES U.S. Inc. · US

Inventors

• Alexander M. Derrickson · Troy, US
• Richard F. Taylor, III · Campbell, US
• Mankyu Yang · Fishkill, US
• Alexander L. Martin · Saratoga Springs, US
• Judson R. Holt · Wappingers Falls, US
• Jagar Singh · Clifton Park, US

Key dates

• Filing date: May 19, 2021
• Grant date: Feb 7, 2023
• Expiry date: May 19, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/017

Abstract

Disclosed is a semiconductor structure including at least one bipolar junction transistor (BJT), which is uniquely configured so that fabrication of the BJT can be readily integrated with fabrication of complementary metal oxide semiconductor (CMOS) devices on an advanced silicon-on-insulator (SOI) wafer. The BJT has an emitter, a base, and a collector laid out horizontally across an insulator layer and physically separated. Extension regions extend laterally between the emitter and the base and between the base and the collector and are doped to provide junctions between the emitter and the base and between the base and the collector. Gate structures are on the extension regions. The emitter, base, and collector are contacted. Optionally, the gate structures and a substrate below the insulator layer are contacted and can be biased to optimize BJT performance. Optionally, the structure further includes one or more CMOS devices. Also disclosed is a method of forming the structure.