Fin structure for fin field effect transistor and method for fabrication the same
US11581438B2 · kind B2 · utility
0Cited by
7References
5Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2020 |
| Grant date | Feb 14, 2023 |
| Priority date | — |
| Expiry date | Aug 12, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/115
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention provides a fin structure for a fin field effect transistor, including a substrate. The substrate includes a plurality of silicon fins, wherein a top of each one of the silicon fins is a round-like shape in a cross-section view. An isolation layer is disposed on the substrate between the silicon fins at a lower portion of the silicon fins while an upper portion of the silicon fins is exposed. A stress buffer layer is disposed on a sidewall of the silicon fins between the isolation layer and the lower portion of the silicon fins. The stress buffer layer includes a nitride portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.