Via for semiconductor devices and related methods
US11605576B2 · kind B2 · utility
1Cited by
4References
20Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 25, 2019 |
| Grant date | Mar 14, 2023 |
| Priority date | — |
| Expiry date | Aug 18, 2039 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/80895
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A via for semiconductor devices is disclosed. Implementations of vias for semiconductor devices may include: a semiconductor substrate that includes a first side; a via extending from the first side of the semiconductor substrate to a pad; a polymer layer coupled along an entire sidewall of the via, the polymer layer in direct contact with the pad; and a metal layer directly coupled over the polymer layer and directly coupled with the pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.