Method for preparing semiconductor structure having buried gate electrode with protruding member

US11605718B2 · kind B2 · utility

Assignee

• NANYA TECHNOLOGY CORPORATION · TW

Inventor

• Tseng-Fu Lu · New Taipei, TW

Key dates

• Filing date: Nov 15, 2021
• Grant date: Mar 14, 2023
• Expiry date: Nov 15, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B12/00

Abstract

The present disclosure provides a method for preparing a semiconductor structure. The method includes providing a substrate comprising a first top surface; forming an isolation region in the substrate to surround an active region; implanting a plurality of dopants into the substrate to form a first impurity region, a second impurity region and a third impurity region in the active region; forming a gate trench in the active region; forming a first barrier layer on a portion of a sidewall of the gate trench; forming a first gate material in the gate trench, wherein the first gate material comprises a first member surrounded by the first barrier layer; forming a second barrier layer on the first barrier layer and the first gate material; forming a second gate material on the second barrier layer; and forming a gate insulating material on the second gate material.