Tseng-Fu Lu
33Patents
3h-index
21Co-inventors
63Inventor score
Filing activity: Mar 12, 1991 → Feb 24, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| USD333797S | Solar powered construction light | General | 4 | Expired |
| US10763212B1 | Semiconductor structure | Electricity | 4 | Active |
| US10818800B2 | Semiconductor structure and method for preparing the same | Electricity | 3 | Active |
| US11417744B2 | Semiconductor structure having buried gate electrode with protruding member and method of manufacturing the same | Electricity | 3 | Active |
| US10937886B2 | Semiconductor device with negative capacitance material in buried channel | Electricity | 2 | Active |
| US11094692B2 | Semiconductor structure having active regions with different dopant concentrations | Electricity | 2 | Active |
| US11315928B2 | Semiconductor structure with buried power line and buried signal line and method for manufacturing the same | Electricity | 2 | Active |
| US10242978B1 | Semiconductor electrostatic discharge protection device | Electricity | 1 | Active |
| US10559661B2 | Transistor device and semiconductor layout structure including asymmetrical channel region | Electricity | 1 | Active |
| US10622030B1 | Memory structure with non-straight word line | Physics | 1 | Active |
| US10825898B2 | Semiconductor layout structure including asymmetrical channel region | Electricity | 1 | Active |
| US11482419B2 | Method for preparing transistor device | Electricity | 0 | Active |
| US10903080B2 | Transistor device and method for preparing the same | Electricity | 0 | Active |
| US11647623B2 | Method for manufacturing semiconductor structure with buried power line and buried signal line | Electricity | 0 | Active |
| US12424564B2 | Semiconductor device having a shielding line for signal crosstalk suppression | Electricity | 0 | Active |
| US11037921B2 | Off chip driver structure | Electricity | 0 | Active |
| US11677008B2 | Method for preparing semiconductor device with T-shaped buried gate electrode | Electricity | 0 | Active |
| US11848353B2 | Method of fabricating semiconductor structure | Electricity | 0 | Active |
| US10461191B2 | Semiconductor device with undercutted-gate and method of fabricating the same | Electricity | 0 | Active |
| US11437481B2 | Semiconductor device with T-shaped buried gate electrode and method for forming the same | Electricity | 0 | Active |
| US10580765B1 | Semiconductor structure for electrostatic discharge protection | Electricity | 0 | Active |
| US11502075B2 | Method of forming semiconductor structure | Electricity | 0 | Active |
| US11605718B2 | Method for preparing semiconductor structure having buried gate electrode with protruding member | Electricity | 0 | Active |
| US11469234B2 | Semiconductor device having reduced contact resistance between access transistors and conductive features and method of manufacturing the same | Electricity | 0 | Active |
| US10381351B2 | Transistor structure and semiconductor layout structure | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.