Apparatuses and methods for staggered timing of skipped refresh operations
US11610622B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 9, 2021 |
| Grant date | Mar 21, 2023 |
| Priority date | — |
| Expiry date | Apr 9, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the disclosure are drawn to apparatuses and methods for staggering the timing of skipped refresh operations on a memory. Memory cells of memories may need to periodically perform refresh operations. In some instances, auto-refresh operations may be periodically skipped when charge retention characteristics of the memory cells of the memory exceed the auto-refresh frequency. To reduce peak current draw during refresh operations, the skipped refresh operations may be staggered across different portions of the memory. In one example, the skipped refresh operation may be staggered in time among memory dies of the memory to limit a number of memory dies that are performing an auto-refresh operation to a maximum number. In another example, the skipped refresh operation may be staggered in time among memory banks of a single memory array to limit a number of memory banks that are performing an auto-refresh operation to a maximum number.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.