Methods of forming dislocation enhanced strain in NMOS and PMOS structures
US11610995B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 9, 2022 |
| Grant date | Mar 21, 2023 |
| Priority date | — |
| Expiry date | Sep 9, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/822
Abstract
Methods of forming a strained channel device utilizing dislocations disposed in source/drain structures are described. Those methods and structures may include forming a thin silicon germanium material in a source/drain opening of a device comprising silicon, wherein multiple dislocations are formed in the silicon germanium material. A source/drain material may be formed on the thin silicon germanium material, wherein the dislocations induce a tensile strain in a channel region of the device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.