Instruction cache prefetch throttle
US11620224B2 · kind B2 · utility
1Cited by
0References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 10, 2019 |
| Grant date | Apr 4, 2023 |
| Priority date | — |
| Expiry date | Dec 10, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Techniques for controlling prefetching of instructions into an instruction cache are provided. The techniques include tracking either or both of branch target buffer misses and instruction cache misses, modifying a throttle toggle based on the tracking, and adjusting prefetch activity based on the throttle toggle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.