MRAM architecture with multiplexed sense amplifiers and direct write through buffers
US11621027B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 8, 2021 |
| Grant date | Apr 4, 2023 |
| Priority date | — |
| Expiry date | Jan 8, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/1673
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A magnetic memory device for storing and quickly retrieving data from an array of magnetic memory elements. The array includes a plurality of magnetic memory element such as magnetic tunnel junction elements arranged in rows and columns. A plurality of multiplexed bit lines is connected with a first end of each of the magnetic memory elements and plurality of multiplexed source lines are connected with a second end of each of the magnetic memory elements. The multiplexing allows source line current and/or bit line current to be applied to an individual column of memory elements in the array for quick retrieval of data in a Magnetic Random Access Memory (MRAM) system.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.