Interconnection structure and semiconductor package including the same
US11637058B2 · kind B2 · utility
0Cited by
13References
19Claims
0Family size
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Key dates
| Filing date | Nov 17, 2020 |
| Grant date | Apr 25, 2023 |
| Priority date | — |
| Expiry date | May 5, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1533
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interconnection structure includes a dielectric layer, and a wiring pattern in the dielectric layer. The wiring pattern includes a via body, a first pad body that vertically overlaps the via body, and a line body that extends from the first pad body. The via body, the first pad body, and the line body are integrally connected to each other, and a level of a bottom surface of the first pad body is lower than a level of a bottom surface of the line body.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.