Performing asynchronous scan operations across memory subsystems
US11650750B2 · kind B2 · utility
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Key dates
| Filing date | Jan 15, 2020 |
| Grant date | May 16, 2023 |
| Priority date | — |
| Expiry date | Nov 18, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/0409
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A first delay value is obtained by a first memory subsystem of a plurality of memory subsystems. The first memory subsystem performs a first scan operation after a first time from a first event for the first memory subsystem. The first time is based on the first delay value. A second memory subsystem of the plurality of memory subsystems performs a second scan operation based upon a second delay value that is different than the first delay value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.