Patent · US Active

Method of manufacturing a semiconductor structure

US11659707B2 · kind B2 · utility

0Cited by
0References
9Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMar 22, 2022
Grant dateMay 23, 2023
Priority date—
Expiry dateMar 22, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/666
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A method of manufacturing a semiconductor structure includes providing a substrate having an active region surrounded by an isolation layer; forming a first trench and a second trench in the active region, and a third trench and a fourth trench in the isolation layer; forming a bottom work-function layer in the third trench and the fourth trench, respectively; forming a middle work-function layer on the bottom work-function layer and in the first and the second trenches; forming a top work-function layer on the middle work-function layer; and forming a capping layer on the top work-function layer that fills a remaining region of the first, the second, the third and the fourth trenches.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.