Transformed geometry data cache for graphics processing systems
US11663771B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 20, 2021 |
| Grant date | May 30, 2023 |
| Priority date | — |
| Expiry date | Aug 20, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06T15/005
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A cache for use in a tile-based rendering graphics processing system for storing transformed primitive blocks, the graphics processing system having a rendering space sub-divided into a plurality of tiles to which primitives can be associated, the graphics processing system comprising rasterization logic that rasterizes primitives on a per tile basis in a plurality of stages, the cache comprising: memory configured to store a plurality of transformed primitive blocks in the cache, each transformed primitive block comprising transformed geometry data for one or more primitives; control logic configured to: maintain a counter for each of the plurality of transformed primitive blocks stored in the cache that indicates a number of tiles of the plurality of tiles that are currently being processed by the rasterization logic and require access to that transformed primitive block, the counter being updated when any stage of the rasterization logic indicates a tile no longer requires access to the transformed primitive block; in response to receiving a request to add a new transformed primitive block to the cache when the cache is full, select a transformed primitive block to evict from th…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.