Device with embedded high-bandwidth, high-capacity memory using wafer bonding
US11670620B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 29, 2020 |
| Grant date | Jun 6, 2023 |
| Priority date | — |
| Expiry date | Apr 1, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/00014
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An electronic device with embedded access to a high-bandwidth, high-capacity fast-access memory includes (a) a memory circuit fabricated on a first semiconductor die, wherein the memory circuit includes numerous modular memory units, each modular memory unit having (i) a three-dimensional array of storage transistors, and (ii) a group of conductors exposed to a surface of the first semiconductor die, the group of conductors being configured for communicating control, address and data signals associated the memory unit; and (b) a logic circuit fabricated on a second semiconductor die, wherein the logic circuit also includes conductors each exposed at a surface of the second semiconductor die, wherein the first and second semiconductor dies are wafer-bonded, such that the conductors exposed at the surface of the first semiconductor die are each electrically connected to a corresponding one of the conductors exposed to the surface of the second semiconductor die. The three-dimensional array of storage transistors may be formed by NOR memory strings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.