Patterning methods for semiconductor devices
US11676852B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2020 |
| Grant date | Jun 13, 2023 |
| Priority date | — |
| Expiry date | Aug 17, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Semiconductor devices and methods of forming semiconductor devices are provided. A method includes forming a first mask layer over an underlying layer, patterning the first mask layer to form a first opening, forming a non-conformal film over the first mask layer, wherein a first thickness of the non-conformal film formed on the top surface of the first mask layer is greater than a second thickness of the non-conformal film formed on a sidewall surface of the first mask layer, performing a descum process, wherein the descum process removes a portion of the non-conformal film within the first opening, and etching the underlying layer using the patterned first mask layer and remaining portions of the non-conformal film as an etching mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.