Control data registers for scan testing
US11680984B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2022 |
| Grant date | Jun 20, 2023 |
| Priority date | — |
| Expiry date | Feb 28, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31926
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In some examples, a circuit includes a custom control data register (CCDR) circuit having a scan path. The CCDR circuit includes a shift register and an update register. The shift register is configured to receive scan data from a scan data input (CDR_SCAN_IN) on a first clock edge responsive to a scan enable signal (CDR_SCAN_EN) being enabled. The update register is configured to receive data from the shift register on a second clock edge after the first clock edge when the scan enable (CDR_SCAN_EN) is enabled. The update register data is asserted as a scan data output (CDR_SCAN_OUT). The second scan path includes the scan data input, the shift register, the update register, and the scan data output.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.