Inventor · Kanchinakote, IN

Nikita Naresh

11Patents
1h-index
10Co-inventors
43Inventor score

Filing activity: Feb 16, 2017 → Aug 22, 2023

Most-cited inventions

PatentTitleAreaCited byStatus
US10866280B2 Scan chain self-testing of lockstep cores on reset Physics 3 Active
US10818374B2 Testing read-only memory using memory built-in self-test controller Physics 1 Active
US11555853B2 Scan chain self-testing of lockstep cores on reset Physics 1 Active
US10460821B2 Area efficient parallel test data path for embedded memories Physics 1 Active
US11715544B2 System and method for low power memory test Electricity 0 Active
US11852683B2 Scan chain self-testing of lockstep cores on reset Physics 0 Active
US9899103B2 Area efficient parallel test data path for embedded memories Physics 0 Active
US11776656B2 System and method for parallel memory test Physics 0 Active
US11521698B2 Testing read-only memory using memory built-in self-test controller Physics 0 Active
US11680984B1 Control data registers for scan testing Physics 0 Active
US12142337B2 System and method for parallel memory test Physics 0 Active

Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.