Packaged electronic circuits having moisture protection encapsulation and methods of forming same
US11682634B2 · kind B2 · utility
0Cited by
6References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Oct 1, 2020 |
| Grant date | Jun 20, 2023 |
| Priority date | — |
| Expiry date | Feb 2, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2223/6683
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A packaged electronic circuit includes a substrate having an upper surface, a first metal layer on the upper surface of the substrate, a first polymer layer on the first metal layer opposite the substrate, a second metal layer on the first polymer layer opposite the first metal layer, a dielectric layer on the first polymer layer and at least a portion of the second metal layer and a second polymer layer on the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.