Semiconductor device having a high breakdown voltage

US11682696B2 · kind B2 · utility

Assignee

• Infineon Technologies Dresden GmbH & Co. KG · DE

Inventors

• Ahmed Mahmoud · Freising, DE
• Franz Hirler · Isen, DE
• Marco Mueller · Villach, AT
• Rolf Weis · Dresden, DE

Key dates

• Filing date: May 26, 2021
• Grant date: Jun 20, 2023
• Expiry date: Jul 3, 2041

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/87
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A semiconductor device includes a layer stack with first and second semiconductor layers of complementary doping types are arranged alternatingly between first and second surfaces of the layer stack. A first semiconductor region adjoins the first semiconductor layers and has a first end arranged in a first device region and extends from the first end into a second device region. Second semiconductor regions adjoin at least one of the second semiconductor layers. A third semiconductor region adjoins the first semiconductor layers. The first semiconductor region extends from the first device region into the second device region and is spaced apart from the third semiconductor region. The second semiconductor regions are arranged between, and spaced apart from, the third and first semiconductor regions. A fourth semiconductor region adjoins the first semiconductor layers, is spaced apart from the first semiconductor region, and is arranged in the first device region between the first end of the first semiconductor region and the third semiconductor region.