Semiconductor package
US11688707B2 · kind B2 · utility
0Cited by
5References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 4, 2021 |
| Grant date | Jun 27, 2023 |
| Priority date | — |
| Expiry date | Jul 17, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3841
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Provided is a semiconductor package including: a first substrate having a first electrode pad and a first protective layer in which a cavity is formed; a first bump pad arranged in the cavity and connected to the first electrode pad; a second substrate facing the first substrate and having a second bump pad; and a bump structure in contact with the first bump pad and the second bump pad, wherein the first electrode pad has a trapezoidal shape, and the first bump pad has a flat upper surface and an inclined side surface extending along a side surface of the first electrode pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.