Method and apparatus for symmetric aging of clock trees
US11689203B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2022 |
| Grant date | Jun 27, 2023 |
| Priority date | — |
| Expiry date | Mar 21, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1737
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In certain aspects, an apparatus includes a gating circuit having an enable input, a signal input, and an output, wherein the enable input is configured to receive an enable signal. The apparatus also includes a toggle circuit having an output, wherein the toggle circuit is configured to toggle a logic state at the output of the toggle circuit based on the enable signal. The apparatus further includes a multiplexer having a first input, a second input, and an output, wherein the first input of the multiplexer is coupled to the output of the gating circuit, the second input of the multiplexer is coupled to the output of the toggle circuit. The multiplexer is configured to select one of the first input and the second input based on the enable signal, and couple the selected one of the first input and the second input to the output of the multiplexer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.