Patent · US Active

Performing error checking operations on encrypted write data in a memory sub-system

US11709729B2 · kind B2 · utility

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14Claims
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Assignee

Inventors

Key dates

Filing dateSep 29, 2021
Grant dateJul 25, 2023
Priority date
Expiry dateSep 29, 2041

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F21/602
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

System and methods are disclosed including a plurality of memory devices and a processing device, operatively coupled with the plurality of memory devices, to perform operations comprising: receiving, from a host system, encrypted write data appended with error-checking data; determining whether the encrypted write data contains an error based on the error-checking data; and responsive to determining that the encrypted write data contains an error, notifying the host system that the encrypted write data contains an error.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.