Filtering micro-operations for a micro-operation cache in a processor
US11726783B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2020 |
| Grant date | Aug 15, 2023 |
| Priority date | — |
| Expiry date | Jun 19, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor includes a micro-operation cache having a plurality of micro-operation cache entries for storing micro-operations decoded from instruction groups and a micro-operation filter having a plurality of micro-operation filter table entries for storing identifiers of instruction groups for which the micro-operations are predicted dead on fill if stored in the micro-operation cache. The micro-operation filter receives an identifier for an instruction group. The micro-operation filter then prevents a copy of the micro-operations from the first instruction group from being stored in the micro-operation cache when a micro-operation filter table entry includes an identifier that matches the first identifier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.