Marko Scrbak
10Patents
1h-index
16Co-inventors
40Inventor score
Filing activity: Apr 23, 2020 → Sep 30, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US11681620B2 | Using error correction code (ECC) bits for retaining victim cache lines in a cache block in a cache memory | Physics | 1 | Active |
| US11914517B2 | Method and apparatus for monitoring memory access traffic | Physics | 0 | Active |
| US12271318B2 | Method and apparatus for managing a cache directory | Physics | 0 | Active |
| US11762777B2 | Method and apparatus for a dram cache tag prefetcher | Emerging Cross-Sectional Technologies | 0 | Active |
| US12153524B2 | Apparatus, system, and method for throttling prefetchers to prevent training on irregular memory accesses | Physics | 0 | Active |
| US11847062B2 | Re-fetching data for L3 cache data evictions into a last-level cache | Emerging Cross-Sectional Technologies | 0 | Active |
| US12019566B2 | Arbitrating atomic memory operations | Physics | 0 | Active |
| US12360907B2 | Region pattern-matching hardware prefetcher | Physics | 0 | Active |
| US11726783B2 | Filtering micro-operations for a micro-operation cache in a processor | Emerging Cross-Sectional Technologies | 0 | Active |
| US12099723B2 | Tag and data configuration for fine-grained cache memory | Physics | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.