Semiconductor devices including ferroelectric memory and methods of forming the same
US11727976B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 25, 2022 |
| Grant date | Aug 15, 2023 |
| Priority date | — |
| Expiry date | Jul 25, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/121
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor device including a capacitor, with a memory film isolating a first electrode from a contact, formed over a transistor and methods of forming the same are disclosed. In an embodiment, a semiconductor device includes a gate stack over a semiconductor substrate; a capacitor over the gate stack, the capacitor including a first electrode extending along a top surface of the gate stack, the first electrode being U-shaped; a first ferroelectric layer over the first electrode; and a second electrode over the first ferroelectric layer, a top surface of the second electrode being level with a top surface of the first ferroelectric layer, and the top surface of the first ferroelectric layer and the top surface of the second electrode being disposed further from the semiconductor substrate than a topmost surface of the first electrode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.