Chenchen Jacob Wang
56Patents
5h-index
52Co-inventors
71Inventor score
Filing activity: Sep 7, 2010 → Dec 10, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9660183B2 | Integration of spintronic devices with memory device | Electricity | 16 | Active |
| US11404091B2 | Memory array word line routing | Electricity | 10 | Active |
| US9727685B2 | Method, apparatus, and system for improved standard cell design and routing for improving standard cell routability | Physics | 9 | Active |
| US10147714B2 | Method, apparatus, and system for two-dimensional power rail to enable scaling of a standard cell | Electricity | 8 | Active |
| US9679809B1 | Method of forming self aligned continuity blocks for mandrel and non-mandrel interconnect lines | Electricity | 8 | Active |
| US8754370B1 | Sheathless interface for coupling capillary electrophoresis with mass spectrometry | Physics | 5 | Active |
| US10381339B1 | Integrated circuits with memory cell test circuits and methods for producing the same | Physics | 5 | Active |
| US10366917B2 | Methods of patterning variable width metallization lines | Electricity | 4 | Active |
| US10128309B2 | Storage layer for magnetic memory with high thermal stability | Electricity | 4 | Active |
| US10134459B2 | MRAM with metal-insulator-transition material | Electricity | 3 | Active |
| US8659853B2 | Sensor arrangement | Emerging Cross-Sectional Technologies | 3 | Active |
| US9666640B2 | High thermal budget magnetic memory | Electricity | 2 | Active |
| US11581368B2 | Memory device, integrated circuit device and method | Electricity | 2 | Active |
| US11217629B2 | Semiconductor device and manufacturing method thereof | Electricity | 2 | Active |
| US11355551B2 | Multi-level magnetic tunnel junction NOR device with wrap-around gate electrodes and methods for forming the same | Electricity | 2 | Active |
| US10439129B2 | Shielded MRAM cell | Electricity | 1 | Active |
| US9570138B2 | Magnetic memory cells with fast read/write speed | Electricity | 1 | Active |
| US12002534B2 | Memory array word line routing | Electricity | 1 | Active |
| US10840297B2 | Storage layer for magnetic memory with high thermal stability | Electricity | 1 | Active |
| US10374154B1 | Methods of shielding an embedded MRAM array on an integrated circuit product comprising CMOS based transistors | Electricity | 1 | Active |
| US11864393B2 | Memory device, integrated circuit device and method | Electricity | 1 | Active |
| US10593866B2 | Magnetic field assisted MRAM structures, integrated circuits, and methods for fabricating the same | Electricity | 0 | Active |
| US11727976B2 | Semiconductor devices including ferroelectric memory and methods of forming the same | Electricity | 0 | Active |
| US11970517B2 | Compositions and methods for dissolving protein aggregates | Chemistry; Metallurgy | 0 | Active |
| US12225733B2 | System-on-chip with ferroelectric random access memory and tunable capacitor | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.