Dual mode interconnect

US11730325B2 · kind B2 · utility

Assignee

• XILINX, INC. · US

Inventors

• Peter McColgan · Dublin, IE
• Goran H K Bilski · Mölndal, SE
• Juan J. Noguera Serra · San Jose, US
• Jan Langer · Chemnitz, DE
• Baris Ozgul · Dublin, IE
• David Clarke · Dublin, IE

Key dates

• Filing date: Sep 7, 2021
• Grant date: Aug 22, 2023
• Expiry date: Oct 8, 2041

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02D10/00
• WIPO field: Digital communication
• WIPO sector: Electrical engineering

Abstract

Examples herein describe techniques for communicating between data processing engines in an array of data processing engines. In one embodiment, the array is a 2D array where each of the DPEs includes one or more cores. In addition to the cores, the data processing engines can include streaming interconnects which transmit streaming data using two different modes: circuit switching and packet switching. Circuit switching establishes reserved point-to-point communication paths between endpoints in the interconnect which routes data in a deterministic manner. Packet switching, in contrast, transmits streaming data that includes headers for routing data within the interconnect in a non-deterministic manner. In one embodiment, the streaming interconnects can have one or more ports configured to perform circuit switching and one or more ports configured to perform packet switching.