Memory access bounds checking for a programmable atomic operator
US11734173B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2022 |
| Grant date | Aug 22, 2023 |
| Priority date | — |
| Expiry date | Jun 30, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1012
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Devices and techniques for memory access bounds checking for a programmable atomic operator are described herein. A processor can execute a programmable atomic operator with a base memory address. The processor can obtain a memory interleave size indicator corresponding to the programmable atomic operator and calculate a contiguous memory address range from the base memory address and the memory interleave size. The processor can then detect that a memory request from the programmable atomic operator is outside the contiguous memory address range and deny the memory request when it is outside of the contiguous memory address range and allow the memory request otherwise.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.