Three-dimensional memory device with static random-access memory
US11735243B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 8, 2021 |
| Grant date | Aug 22, 2023 |
| Priority date | — |
| Expiry date | Nov 8, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/27
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of 3D memory devices with a static random-access memory (SRAM) and fabrication methods thereof are disclosed herein. In certain embodiments, the 3D memory device includes a first semiconductor structure and a second semiconductor structure. The first semiconductor structure includes an array of SRAM cells and a first bonding layer, and the second semiconductor structure includes an array of 3D NAND memory strings and a second bonding layer. The first semiconductor structure is attached with the second semiconductor structure through the first bonding layer and the second bonding layer. The array of 3D NAND memory strings and the array of SRAM cells are coupled through a plurality of bonding contacts in the first bonding layer and the second bonding layer and are arranged at opposite sides of the plurality of bonding contacts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.