Chip package and method of forming a chip package
US11735534B2 · kind B2 · utility
0Cited by
3References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 28, 2021 |
| Grant date | Aug 22, 2023 |
| Priority date | — |
| Expiry date | Jul 2, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/365
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip package is provided. The chip package may include at least one chip, an exposed metal region and a metal protection layer structure over the exposed metal region and configured to protect the metal region from oxidation. The protection layer structure includes a low-temperature deposited oxide, and a hydrothermally converted metal oxide layer over the protection layer structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.