Integrated assemblies which include stacked memory decks

US11744072B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• John D. Hopkins · Meridian, US
• Justin B. Dorhout · Boise, US
• Nirup Bandaru · Boise, US
• Damir Fazil · Boise, US
• Nancy M. Lomeli · Boise, US
• Jivaan Kishore Jhothiraman · Meridian, US
• Purnima Narayanan · Boise, US

Key dates

• Filing date: Aug 2, 2021
• Grant date: Aug 29, 2023
• Expiry date: Sep 25, 2041

Classification

• Technology area (CPC G): Physics
• CPC primary: G11C16/08
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

Some embodiments include an integrated assembly having a first deck which has first memory cells, and having a second deck which has second memory cells. The first memory cells have first control gate regions which include a first conductive material vertically between horizontally-extending bars of a second conductive material. The second memory cells have second control gate regions which include a fourth conductive material along an outer surface of a third conductive material. A pillar passes through the first and second decks. The pillar includes a dielectric-barrier material laterally surrounding a channel material. The first and fourth materials are directly against the dielectric-barrier material. Some embodiments include methods of forming integrated assemblies.