Method of manufacturing semiconductor devices including the steps of removing a plurality of spacers that surrounds each of the plurality of nanotubes into a layer of nanotubes, and forming gate dielectric and/or gate electrode
US11749528B2 · kind B2 · utility
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3References
20Claims
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Key dates
| Filing date | May 4, 2022 |
| Grant date | Sep 5, 2023 |
| Priority date | — |
| Expiry date | May 4, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K71/40
- WIPO fieldChemical engineering
- WIPO sectorChemistry
Abstract
A semiconductor device and method of manufacturing using carbon nanotubes are provided. In embodiments a stack of nanotubes are formed and then a non-destructive removal process is utilized to reduce the thickness of the stack of nanotubes. A device such as a transistor may then be formed from the reduced stack of nanotubes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.